
Paweł Wielgus

Anusha Nerella
Anusha Nerella is an award-winning AI and fintech innovator known for her original contributions in transforming institutional trading and digital finance. She has pioneered AI-driven trading strategies, real-time big data systems, and automation frameworks that have redefined how financial institutions operate. Anusha’s innovations—from modernizing Barclaycard’s digital payments infrastructure during COVID-19 to architecting intelligent trading models—have driven measurable impact, earning her recognition as a thought leader shaping the future of AI-powered finance.

Dave Lazovsky
Dave Lazovsky is the Co-founder and CEO of Celestial AI, the creators of the Photonic FabricTM. Celestial AI, founded in April 2020, has developed the optical interconnectivity technology platform for AI computing.
Prior to founding Celestial AI, Mr. Lazovsky was a Venture Partner at Khosla Ventures. He has 30 years of experience in the semiconductor industry and over two decades of experience building and leading successful start-ups. In 2004 Mr. Lazovsky founded Intermolecular, a semiconductor and clean energy R&D and Intellectual Property licensing company. He served as the company’s Chief Executive Officer, President and as a member of the board of directors from September 2004 through October 2014.
As President and CEO, Mr. Lazovsky led all aspects of the business through its lifecycle from early-stage start-up to public company. Intermolecular (IMI) went public on the NASDAQ in 2011. He currently has over 80 issued and pending U.S. patents.

Godwin Maben
Godwin Maben is a seasoned professional with an extensive 30-year experience in the semiconductor industry, specializing in low-power design and power optimization for System on Chip (SoC) architectures. Godwin has contributed to the development of SoCs for mobile, IoT, GPU, and networking applications, focusing on ARM and RISC-V based designs.
Godwin has a proven track record in developing the architecture of Power Management Integrated Circuits (PMIC) for mobile and IoT devices, and architecting mobile SoCs with advanced power structures, including power gating, Dynamic Voltage and Frequency Scaling (DVFS), and Multi-Voltage (MV) techniques.
In addition to optimizing logic, system, and RTL architectures to reduce power for hundreds of blocks, Godwin has extensive experience in RTL coding, specifically targeting energy efficiency for hundreds of partitions. Skilled in developing custom cells to minimize glitches and has implemented algorithms within tools to optimize power consumption.
Godwin has developed comprehensive methodologies for implementing zero-pin retention flops from pre-RTL to silicon and has architected tools such as UPF Architect. Additionally, has created higher-level abstractions to Natural Language Processing (NLP) for various tools, including HDL, SDC, and UPF.
With expertise in designing low-power circuits and HDL coding with a focus on low power, Godwin excels in power architecture, PMIC design, and debugging power issues from simulation through emulation, synthesis, place, and route (P&R), and Engineering Change Order (ECO) processes. Dedicated to advancing low-power design techniques and methodologies, ensuring the development of energy-efficient and high-performance semiconductor solutions.